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<TITLE>Alberto Sangiovanni-Vincentelli</TITLE>
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<H1><!WA0><IMG SRC="http://www.cs.berkeley.edu/People/Faculty/Images/sangiovanni.gif" ALT=""> Alberto Sangiovanni-Vincentelli</H1>

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Ph.D., Universita Politecnico de Milano
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Professor<BR>
(510) 642-4882<BR>
<!WA1><A HREF="mailto:alberto@eecs.berkeley.edu">alberto@eecs.berkeley.edu</A>
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<H2>Awards/Lectureships</H2>

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<LI> IEEE Graduate Teaching Award, 1995<br>
<LI> Darlington Award, 1987-1988<BR>
<LI> Guillemin-Cauer Award (co-recipient), 1982-1983<BR>
<LI> Fellow, IEEE<BR>
<LI> Corporate Fellow, Harris, and Thinking Machines<BR>
<LI> Keynote Speaker, BIAS, 1992<BR>
<LI> Keynote Speaker, European Design Automation Conference, 1992<BR>
<LI> Keynote Speaker, MicroCircuit Engineering, 1991<BR>
<LI> Keynote Speaker, CompEuro, 1991<BR>
<LI> Keynote Speaker, International Test Conference, 1988<BR>
<LI> Keynote Speaker, International Electron Device Meeting, 1988<BR>
<LI> Keynote Speaker, International Conference on Computer Design, 1986<BR>
<LI> Best Paper Award, Design Automation Conference, 1991<BR>
<LI> Best Paper Award, Circuits and Systems Society of the IEEE, 1989-1990<BR>
<LI> Best Paper Award, Design Automation Conference, 1983<BR>
<LI> Best Paper Award, Design Automation Conference, 1982<BR>
<LI> Best Presentation Award, Design Automation Conference, 1982<BR>
<LI> Distinguished Teaching Award, UC Berkeley Academic Senate, 1981<BR>

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<H2>Editorships/Program Committees</H2>

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<LI>
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<STRONG>General Chair</STRONG><BR>
<I>International Conference on CAD, 1990</I>
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<LI>
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<STRONG>Technical Program Chair</STRONG><BR>
<I>International Conference on CAD, 1989</I>
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<H2>Selected Publications</H2>

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<LI>
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<STRONG>Multilevel Logic Synthesis</STRONG><BR>
(with R. Brayton and G. Hachtel), <I>Proc. 
IEEE, </I>Vol 78, No. 2, February 1990, pp. 264-300.
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<LI>
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<STRONG>A Synthesis and Optimization Procedure for Fully and Easily Testable 
Sequential Machines</STRONG><BR>
(with S. Devadas, T. Ma, and R. Newton), <I>IEEE 
Trans. on CAD of ICAS,</I> Vol. 8, No. 10, October 1989, pp. 1100-1108.
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<LI>
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<STRONG>Convergence and Finite-Time Behavior of Simulated Annealing</STRONG><BR>
(with D. Mitra and F. Romeo), <I>J. Applied Probability, </I>1988.
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<LI>
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<STRONG>MIS: A Multiple-Level Logic Optimization System</STRONG><BR>
(with R. Brayton, R. Rudell,and A. Wang), <I>IEEE Trans. CAD of ICAS, </I> Vol. CAD-6, No. 6, November 1987, pp. 1062-1082.
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<LI>
<P>
<STRONG>The Waveform Relaxation Method for the Time Domain Analysis of Large 
Scale Integrated Circuits</STRONG><BR>
(with E. Lelarasmee and A. Ruehli), <I>IEEE 
Trans. on CAD for IC, </I>July 1982, pp. 131-145.
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